Features & Benefits VITA 57.1 and VITA 57.4 compatible versions Standard FMC interface Reduced design time Integrated optical transmitter and receivers Applications RADAR High-performance computing Network switches and routers High resolution imaging Audio and video broadcast
Communication interface Two 12 MT-type optical connectors, one on the LightABLE TX transceiver and one on the LightABLE RX transceiver. An industry standard OM3 optical ribbon with an MT-terminated compatible connector at one end can plug into each receptacle. One SSMC connector for external reference clock, AC coupled and 50 Ω-terminated on-board. Can be driven by either a sine wave source (0 to 10 dBm), or a square wave source (LVPECL/CMOS). Clock signal provided by FPGA carrier on FMC connector. LVDS 100 Ω differential signal and AC coupled input. Local 25 MHz crystal (optional oscillator for special frequency generation when necessary) Board Electrical/environmental VITA 57.1 HPC connector or VITA 57.4 HSPC connector Power dissipation: 3.5 W including the consumption of the two optical engines FMC I/O voltage: VADJ= 1.8 V or 2.5 V (factory settings) Front board 2 MT-interface 12 fibers Connector (VITA 57.1/57.4) 10 (VITA 57.1) or 12 (VITA 57.4) data differential pairs connected to multigigabit transceivers Multigigabit transceivers clock output Reference clock input Clock output I2C bus Laser control, TX/RX alarm and clock status Clock A high performance low noise on board clock synthesizer feeds four clocks to the FPGA carrier board: Three reference clocks for the FPGA multigigabit transceivers One differential LVDS clock signal available as a FPGA global clock (GC) The reference clock sources can be either: On-board 25 MHz ±25 ppm crystal oscillator well suited for most standard applications LVDS reference clock provided by FPGA carrier Six predefined clock settings are available at power-up with different settings of the clock synthesizer