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Can AI predict its own reliability? Reliability testing next gen SoC's

In this webinar, we will explore the segment trends for next-generation AI Accelerator Processor Units (APUs) and Tensor Processing Units (TPUs). We’ll provide an overview of the market, highlighting segment growth and its impact on the semiconductor industry as a whole.

Additionally, we will examine the manufacturing challenges that significantly affect product performance during reliability testing of these devices. As many System-on-Chip (SoC) devices have expanded from 9,000 input/output channels and a thermal design power (TDP) of 850W to customer roadmaps indicating 12,000 I/O channels and TDPs exceeding 1,500W, the increased size and complexity present new challenges.

Traditionally, reliability testing was manageable even with larger devices. However, as we shift from a low-voltage, low-functionality Burn-In cycle to a more comprehensive “System Level Burn-In” test, we are now required to conduct more functional tests at higher temperatures for extended durations. This increase in I/O channels translates to a Burn-In socket with spring contacts for each I/O, necessitating that both the Burn-In oven and the Burn-In Board (BIB) accommodate more resources for the SoC.

Previously, during reliability testing, a customer might have populated only one-third of the I/O channels with spring pins, allowing for fewer system resources and enabling 24 to 32 SoCs per oven. In contrast, next-generation devices may only accommodate 4 to 8 SoCs per oven. Given that semiconductor products are typically tested in lots, the resource impact of testing a lot of 125 units becomes significant.

We will outline the solutions currently available and introduce our next-generation test socket technologies designed to meet the increased performance and power demands. We will also explore cost-effective solutions for testing these devices fully.

Key Takeaways:

  • Discover current market trends on AI
  • New requirements to scale for next gen SoC's  
  • Smiths Interconnect Burn-in and Semiconductor Test product offering  
  • Introduction of our Next generation IC test platform 
  • Can Chat GPT provide accurate answers to your live questions?       

Presenters

  • Tim Wooden

    Tim Wooden

    Market Development Director

    Tim is an expert in semiconductor package test, with deep experience in the design, deployment, and application of advanced test socket solutions, System Level, RF Testing, PoP, SoC, High Power, Thermal and Fine Pitch. With specific expertise in Technical Sales, Product Development, Marketing and Business Development.

  • Joshua Daniel

    Joshua Daniel

    Product Line Manager Semiconductor Test

    Josh has been in the Burn-In industry nearly a decade with hands on experience in design, manufacturing, technical, and commercial aptitudes to include in-line automation of manufacturing and development of nex-gen computing device test fixtures.